Project Update: Bare-Metal Clock Validation & Bi-Directional Telemetry

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Date: March 23, 2026

Hardware: STM32F446RE (Nucleo-64)

Toolchain: STM32CubeIDE, Ubuntu 24.04, UART-to-USB

Technical Overview

In this milestone, I successfully moved beyond high-level abstraction by implementing a manual hardware handshake for the System Clock. While the HAL handles the initial SystemClock_Config, I implemented a direct register-level check of the RCC_CR (Clock Control Register) to ensure oscillator stability before entering the main application logic.

Key Implementation Details:

  • Clock Tree Optimization: Configured the Phase-Locked Loop (PLL) to drive the Cortex-M4 core at 84MHz, verified via FLASH_LATENCY_2 settings.
  • Register-Level Monitoring: Implemented real-time bit-masking to monitor the PLLRDY bit. This ensures the high-speed “Turbo” clock is locked and stable.
  • Bi-Directional Telemetry: Developed a UART communication layer (115,200 baud) that provides:
    • Outbound: Real-time hex-dumps of the RCC_CR register.
    • Inbound: A command-listener that dynamically modifies HAL_Delay parameters (Fast/Slow modes) without requiring a system reset.

Results

The system successfully reports a stable 0x03007C83 state, confirming both the Internal High Speed (HSI) and Main PLL are engaged. The interactive UART layer allows for live tuning of peripheral behavior, a foundational requirement for my upcoming STM32-BlackBox-Telemetry logger.

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